As the operating frequencies of electronic devices enter the gigahertz range and as the dimensions of device features become smaller, insulating materials with low dielectric constants (low-k dielectric materials) are needed to achieve reasonable power consumption, to reduce signal delay, and to minimize interconnect crosstalk in high performance ULSI circuits. Materials with low dielectric constants are strongly desired in many microelectronic device applications, including both gap filling and Damascene applications. The dielectric constant of a dielectric material is one property indicative of its quality. Other characteristics indicative of the quality of a dielectric material include mechanical properties, index of refraction, uniformity, thermal stability, manufacturability, integration with Cu or Al and the like.
Most dielectric films are formed using either a spin coating approach, or a chemical vapor deposition approach, e.g., PECVD or HDP. In the spin coating approach, a spin coatable solution containing a dielectric film precursor (usually one or more curable monomers, oligomers, and/or polymers) dissolved in a suitable solvent is spin coated onto a rotating substrate, such as a microelectronic device precursor (e.g., a silicon wafer) or the like, to form a uniform, relatively thin film coating on the substrate. The coated substrate is then baked at a temperature typically in the range of 100° C. to about 325° C. in order to remove the solvent, dry the coating, and advance the dielectric material to the B-stage of polymerization. The coating is then cured, i.e., advanced to the C-stage of polymerization, by heating the substrate at a suitable curing temperature typically in the range of about 350° C. to about 450° C.
The cured dielectric films are generally collectively referred to as low-k spin on dielectric materials. A variety of low-k spin on dielectric precursor materials are commercially available from a number of different vendors and are sold for the purpose of forming dielectric films in microelectronic devices. Representative examples of such products are available under the trade designations FLARE from Honeywell, Inc., SILK from Dow Chemical Co., VALOX from Schumacher, HOSP from Honeywell, Inc., and HSQ from Dow Corning Company. The FLARE and SILK materials are organic, being poly(arylene) ethers and aromatic, respectively. The HOSP material is inorganic-organic, being a methyl-substituted silsesquioxane. The HSQ material is inorganic, being a hydrogen silsesquioxane. Each of these materials requires unique processing steps for successful integration with multilevel aluminum and/or copper in Dual Damscene processing, although each generally is thermally cured at temperatures in the range from about 350° C. to about 450° C.
Dielectric precursor materials that form porous dielectric films (preferably ultra low-k and extreme low-k films) upon curing are also known. Generally, these materials include not only a curable dielectric precursor but also one or more relatively volatile components (referred to as “porogens”). These porogens tend to outgas during curing, contributing to the film porosity. Representative examples of such materials are known the respective trade designations NAUTILUS™ from the Dow Chemical Co., POROUS FLARE™ from Honeywell, Inc., POLY ELK™ and MONO ELK™ from Schumacher (Carlsbad, Calif.), LKD™ from JSR Corp., ISP™ from Catalysts and Chemicals, Ltd., Japan, and HSG™ from Hitachi Chemical Co., Ltd.
The manner in which a low-k spin on dielectric material is cured has a significant impact upon the quality of the resultant dielectric film. If curing is carried out carelessly, the film quality will suffer. In some instances, the film quality may be too poor to use as a blanket film and/or may not be able to withstand aluminum or copper integration processes. Factors affecting the cure include how the time, temperature, and processing environment are controlled during the cure process.
Conventionally, the coating and baking steps have been carried out in an integrated fashion in the same tool. However, curing typically has been accomplished by heating a batch of coated microelectronic substrates in a stand-alone furnace. Furnaces have been favored because conventional wisdom has the view that heated platen curing cannot produce dielectric films of the quality demanded by the microelectronic industry.
Yet, furnace processing is not the optimum approach from the perspective of the present inventors. Furnace curing tends to be a batch process in which as many as 30 to 100 wafers or more are cured at the same time, yet manufacturers desire single wafer processing to help ensure that each and every in-process wafer is processed under the same conditions. Single wafer processing is also desirable in the event that a process error occurs, because only a single substrate is at risk. In contrast, if a process error occurs during a furnace cure, the entire batch of substrates could be ruined. Given that a single in-process 300 mm wafer can be worth up to $1 million or more, minimizing process risk is an important concern.
In the course of developing the present invention, we also have observed that furnace processing inevitably leads to some nonuniformity and quality problems when making dielectric films. These nonuniformity and quality problems occur, in our view, at least in part because the time period between the bake and cure steps varies too much from substrate to substrate. Generally, those substrates that are baked earlier must wait until later substrates are baked before the entire batch is submitted to the furnace. Indeed, the time between the bake and cure has been inadequately controlled in conventional processes. Other interstation and intrastation time periods also have not been adequately controlled. Examples from conventional processes are the delay between the coat and bake steps as well as the delay between the curing step and the subsequent cooling step. We have discovered that these kinds of time variations can adversely affect film quality and uniformity from lot to lot, and even from substrate to substrate. Additionally, unlike compact, space efficient heated platens, furnaces tend to be rather large, standalone units that occupy valuable cleanroom floorspace.
Accordingly, there remains a strong need for improved ways to manufacture lower k dielectric films, particularly by using a single wafer processing approach to minimize the risk that process deviations will adversely affect more than one wafer. There also remains a desire to effectively use heated platen curing of low-k spin on dielectric materials.